A common structure in various electronics packages, such as laminate packages, wired circuit boards, ceramic substrates, and hybrid circuits, is a via or hole. A via or hole is a vertical opening which can be filled with conducting material used to connect circuits on various layers of a substrate or electronics packages to one another. A hole generally starts as an empty cylindrical opening in an electronics package that is formed by drilling. The hole is then plated with an electrical conductor such as copper or tin. Plating of the hole provides the primary electrical contact at the various layers within the device. After plating, the hole is typically filled with an electrically conductive, thermally conductive or nonconductive paste. Among other reasons, holes are filled after plating to providing a secondary or fail safe electrical connection, to provide structure integrity, to prevent chemical process entrapment from down-line operations, and/or to provide thermal conductivity to remove heat from the inner circuit layers of the resulting device.
A common method for filling holes is to use a squeegee blade to force material into the holes. Squeegee blade application consists of using a metal, polymer, or composite blade to force hole fill material through the holes, using a roll-effect pumping action caused by the squeegee being moved forward at a given angle to that of the substrate under process. This process can lead to divot or material drag-out caused by the trailing edge of the squeegee, leading to poor leveling.
An alternative method of hole filling is to use a print/pressure head and pressurized fill material to fill holes. The use of a print head may involve sealing the print head against a substrate and forcing fill material through the print head and into holes of the substrate located within the area of the substrate sealed by the print head. Such methods and devices are discussed in U.S. patent application Ser. Nos. 09/752,629 and 09/752,503, each of which is incorporated herein by reference in its entirety.
The hole fill process often leaves excess paste material on the printed panel surface. This is especially true for non-uniform printed circuit/wiring boards/panels. The excess material, if cured as processed, can create extensive problems for subsequent planarization that is required to provide a uniform plating, or capping step. The more layers involved in a PCB/PWB, the more non-uniform the surface tends to be. In order to be cost-effective, the number of passes required to level the cured, hole filled panel, must be kept to a minimum. When the minimum number of leveling passes is exceeded, there is often damage to the underlying copper/circuitry, and the panel must be scrapped.